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Technical Staff Engineer - Design (FPGA Fabric)

Microchip Technology Inc. · San Jose, CA · posted 7 weeks ago

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29
Certified filings · by Microchip Technology Inc., FY2026 Q2
$161,179
Median filed wage · for “Technical Staff Engineer - CAD” · 1 filings

Source: US DOL Office of Foreign Labor Certification, LCA disclosure data, FY2026 Q2. Government data is published roughly one quarter in arrears.

This advert was matched to Technical Staff Engineer - CAD, a job title Microchip Technology Inc. has itself sponsored.

The figure above is not this job’s salary. It is what Microchip Technology Inc. reported to the US Department of Labor for the closest role it has sponsored. A filing history means this employer has sponsored before — it is not a promise that this opening carries sponsorship, and not an offer of pay. Check the advert and ask the employer.

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The role, as Microchip Technology Inc. describes it

Job Description: https://wd5.myworkdaysite.com/en-US/recruiting/microchiphr/External/job/Technical-Staff-Engineer---Design--FPGA-Fabric-_R3238-26 - ** Please follow this link to apply to the role, when applying please select "Microchip Recruiter" as your source. This position is for the FPGA Business Unit which designs and develops low power, mixed signal, and system critical FPGA products as part of a comprehensive offering of secure system and power management solutions.

We are seeking a highly skilled and experienced FPGA Fabric Engineer to join our team. As a member of Microchip’s engineering community within the FPGA BU, you will be responsible for the design, development, and optimization of the FPGA fabric, which is a key component of our FPGA-based products. You will collaborate closely with our architecture, hardware design, and technology development teams to deliver cutting-edge FPGA solutions. This is an exciting opportunity to contribute to the development of advanced FPGA technologies and shape the future of our products.

Key Responsibilities: - Design and develop FPGA fabric architecture, including interconnect, routing, logic elements, memory blocks, clocking, and other key components - Analyze and optimize FPGA fabric architecture for performance, power consumption, area utilization, and other relevant metrics - Collaborate with system architects to ensure seamless integration of FPGA fabric with other system components, such as processors, interfaces, and peripherals - Remain informed on industry standards and best practices related to FPGA fabric and incorporate them into the design process - Prepare comprehensive technical documentation, including specifications, design documents, and test plans - Work closely with cross-functional teams, including hardware designers, software engineers, and system architects, to align the FPGA fabric design with overall product requirements - Stay current on latest advancements in FPGA technologies and contribute to ongoing research and innovation efforts within the company

Requirements/Qualifications:

  • Bachelor's, Master's, or Ph.D. degree in Electrical Engineering, Computer Engineering, or a related field
  • 10+ years of industrial experience
  • Required experience in full custom mixed signal design and/or layout experience on advanced process nodes (preferably FinFET)
  • Experience in non-FPGA technology areas would be acceptable, for example memory cell design, stdcell library element design & implementation, analog circuit custom design, IO custom design
  • Experience in parasitic extraction & analysis, simulation, DSM design analysis, EM/IR analysis
  • Experience in hardware description languages such as Verilog or VHDL
  • Experience with Perl/Python Scripting, C/C++ programming will be advantageous
  • Strong analytical and problem-solving skills to optimize performance, power, and area utilization
  • Excellent communication and collaboration skills to work effectively within a multidisciplinary team environment
  • Passion for exploring new technologies and applying innovative solutions to FPGA fabric design challenges
  • Ability to adapt to changing project requirements and priorities in a dynamic work environment

Travel Time:

0% - 25%

Physical Attributes:

Feeling, Handling, Hearing, Other, Seeing, Supervises Others, Talking, Works Alone, Works Around Others

Physical Requirements:

10% walking, 10% standing, 80% sitting; 100% in doors; Usual business hours

Pay Range:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below: Benefits of working at Microchip

The annual bas

Read the full advert and apply on Microchip Technology Inc.’s site →

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