Senior Technical Staff Engineer - Validation (System Design)

The role, as Microchip Technology Inc. describes it

https://wd5.myworkdaysite.com/en-US/recruiting/microchiphr/External/job/Senior-Technical-Staff-Engineer---Validation--System-Design-_R2606-26 - Follow the link to apply for this position. Select "Microchip Recruiter" as your source. Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). We also license Flash-IP solutions that are incorporated in a broad range of products. Microchip Technology Inc. has a Senior Technical Staff Engineer - Validation (System Design) opening based in San Jose, CA. The candidate will be an expert with lab bring up and automation of FPGA design creation and validation; and be able to use FPGAs to create systems level designs; also possess expertise in development of partial re-configuration use cases. The successful candidate will be responsible for the below. - Be an expert with use of FPGAs to create systems level designs to bring up and debug such systems in the lab, including having deep experience in validating systems level UCs for partial reconfiguration - Architecture definition and FPGA design creation utilizing all hardware features and IP cores targeted to existing and future Microchip products. - System and FPGA design must exercise all the use models targeted for each product mimicking end applications in a customer setting. - Develop high level system and product level validation plans for new and existing silicon products and project, execute per plan. Review dependencies, estimate effort and identify and communicate risk. - Understand hardware architectures, define use models and execute / oversee system level design implementations required to utilize the silicon features. - Be not only an effective contributor but also the technical expert related to protocols using high speed serial interfaces in a cross-functional team-oriented environment. - Write high quality code in Verilog, VHDL and C code. Maintain existing code. Support regression and re-use. - Learn new system designs and validation methodologies. Understand FPGA architectures. - Act as the authoritative expert in knowledge domain area(s), be able to mentor senior and junior engineers and provide technical guidance. This involves assigning and monitoring tasks of employees and contractors. - Collaborate with cross-functional managers/teams to identify and resolve inter-dependencies. - Define and improve process followed in the department; follow quality metrics and assess per project. - Must be willing to take regular late night or early morning calls to interface with the engineering team in India Standard Time zone, when and if required. - Use AI based tools to automate workflows and help improve the FPGA design and validation processes

Requirements/Qualifications: - BSEE / BSCS or equivalent with 15+ years of experience

• MSEE / MSCS preferred

• Knowledge of FPGA architectures is a must

• Possess an in-depth understanding of hardware architectures, system level IC design implementation, and knowledge of how to create end use scenarios

• Strong technical background in FPGA prototype emulation, and debug

• Strong technical background in silicon validation, failure analysis and debug

• Excellent Board level debug capabilities in lab environment: hands-on troubleshooting skills for digital logic and analog circuit on PCB’s using oscilloscopes, digital analyzers, protocol exercisers and analyzers, integrated logic analyzers (e.g. Synopsys Id

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